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JEDEC JESD 22-A108C

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JEDEC JESD 22-A108C TEMPERATURE, BIAS, AND OPERATING LIFE

standard by JEDEC Solid State Technology Association, 06/01/2005

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$21.60

-60%

$54.00

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Full Description

A revised method for determining the effects of bias conditions and temperature, over time, on solid state devices is now available. Revision B of A108 includes low temperature operating life (LTOL) and high temperature gate bias (HTGB) stress conditions, revised cool down requirements for high temperature stress, and a procedure to follow if parts are not tested within the allowed time window.

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Published: 06/01/2005 Number of Pages: 13File Size: 1 file , 79 KB